CCS behaviour while saving context during ITRs

joe06 · Guest

Hi All,
I commented the context saving before treating interupts, this code is generated from CCS, who can explain me why CCS check interrupt flags using indirect addressing then perform same check using direct addressing ?
The ISR is called only if the two above checks are successful !
Is a single check using direct addressing not enough ?
thanks
joe

0004: MOVWF 7F // save W to 7F
0005: SWAPF 03,W // swap status
0006: CLRF 03 // clear status
0007: MOVWF 3B // save status
0008: MOVF 0A,W // save PCLATH
0009: MOVWF 3A
000A: CLRF 0A // clear PCLATH
000B: MOVF 04,W // save FSR
000C: MOVWF 3C
000D: MOVF 77,W // save 77
000E: MOVWF 3D
000F: MOVF 78,W // save 78
0010: MOVWF 3E
0011: MOVF 79,W // save 79
0012: MOVWF 3F
0013: MOVF 7A,W // save 7A
0014: MOVWF 40
0015: MOVF 7B,W // save 7B
0016: MOVWF 41
0017: BCF 03.7 // clear IRP
0018: BCF 03.5 // clear RP0
0019: MOVLW 8C // Get PIR1
001A: MOVWF 04 // with indirect addressing
001B: BTFSS 00.5 // Check RCIF if 1
001C: GOTO 01F // goto to check other itr flags
001D: BTFSC 0C.5 // recheck RCIF direct addressing ????????
001E: GOTO 038 // RX itr starts in 038
001F: MOVLW 8C // Get PIR1
0020: MOVWF 04 // with indirect addressing
0021: BTFSS 00.0 // Check for TMR1IF
0022: GOTO 025 // exit ISR
0023: BTFSC 0C.0 // recheck TMR1IF direct addressing ????????
0024: GOTO 03B // TIMER1 itr starts in 03B
0025: MOVF 3C,W
0026: MOVWF 04 // restore FSR
0027: MOVF 3D,W
0028: MOVWF 77 // restore 77
0029: MOVF 3E,W
002A: MOVWF 78 // restore 77
002B: MOVF 3F,W
002C: MOVWF 79 // restore 77
002D: MOVF 40,W
002E: MOVWF 7A // restore 77
002F: MOVF 41,W
0030: MOVWF 7B // restore 77
0031: MOVF 3A,W
0032: MOVWF 0A // restore PCLATH
0033: SWAPF 3B,W
0034: MOVWF 03 // restore STATUS
0035: SWAPF 7F,F
0036: SWAPF 7F,W // restore W
0037: RETFIE
___________________________
This message was ported from CCS's old forum
Original Post ID: 13911

R.J.Hamlett · Guest

:=Hi All,
:=I commented the context saving before treating interupts, this code is generated from CCS, who can explain me why CCS check interrupt flags using indirect addressing then perform same check using direct addressing ?
:=The ISR is called only if the two above checks are successful !
:=Is a single check using direct addressing not enough ?
:=thanks
:=joe
You are misunderstanding what they are doing.
They do not check RCIF twice. They check first if the interrupt is enabled (register PIE1, at address 8C), then if it is enabled, check if this interrupt has happened (PIR1 at address 0C). Obviously, it is possible for an interrupt flag to have triggered on a peripheral, that currently has it's interrupts disabled, hence the two checks...

Best Wishes

:=0004: MOVWF 7F // save W to 7F
:=0005: SWAPF 03,W // swap status
:=0006: CLRF 03 // clear status
:=0007: MOVWF 3B // save status
:=0008: MOVF 0A,W // save PCLATH
:=0009: MOVWF 3A
:=000A: CLRF 0A // clear PCLATH
:=000B: MOVF 04,W // save FSR
:=000C: MOVWF 3C
:=000D: MOVF 77,W // save 77
:=000E: MOVWF 3D
:=000F: MOVF 78,W // save 78
:=0010: MOVWF 3E
:=0011: MOVF 79,W // save 79
:=0012: MOVWF 3F
:=0013: MOVF 7A,W // save 7A
:=0014: MOVWF 40
:=0015: MOVF 7B,W // save 7B
:=0016: MOVWF 41
:=0017: BCF 03.7 // clear IRP
:=0018: BCF 03.5 // clear RP0
:=0019: MOVLW 8C // Get PIR1
:=001A: MOVWF 04 // with indirect addressing
:=001B: BTFSS 00.5 // Check RCIF if 1
:=001C: GOTO 01F // goto to check other itr flags
:=001D: BTFSC 0C.5 // recheck RCIF direct addressing ????????
:=001E: GOTO 038 // RX itr starts in 038
:=001F: MOVLW 8C // Get PIR1
:=0020: MOVWF 04 // with indirect addressing
:=0021: BTFSS 00.0 // Check for TMR1IF
:=0022: GOTO 025 // exit ISR
:=0023: BTFSC 0C.0 // recheck TMR1IF direct addressing ????????
:=0024: GOTO 03B // TIMER1 itr starts in 03B
:=0025: MOVF 3C,W
:=0026: MOVWF 04 // restore FSR
:=0027: MOVF 3D,W
:=0028: MOVWF 77 // restore 77
:=0029: MOVF 3E,W
:=002A: MOVWF 78 // restore 77
:=002B: MOVF 3F,W
:=002C: MOVWF 79 // restore 77
:=002D: MOVF 40,W
:=002E: MOVWF 7A // restore 77
:=002F: MOVF 41,W
:=0030: MOVWF 7B // restore 77
:=0031: MOVF 3A,W
:=0032: MOVWF 0A // restore PCLATH
:=0033: SWAPF 3B,W
:=0034: MOVWF 03 // restore STATUS
:=0035: SWAPF 7F,F
:=0036: SWAPF 7F,W // restore W
:=0037: RETFIE
___________________________
This message was ported from CCS's old forum
Original Post ID: 13914

joe06 · Guest

Oups ! you are rigth ... sorry !
another questions anyway:
- Why the line 18 ? (clear RP0) since the status register has been cleared before (line 6).

- why CCS uses indirect addressing to access to PIR1 instead of using bank switching ?

thanks in advance !
Joe

:=:=Hi All,
:=:=I commented the context saving before treating interupts, this code is generated from CCS, who can explain me why CCS check interrupt flags using indirect addressing then perform same check using direct addressing ?
:=:=The ISR is called only if the two above checks are successful !
:=:=Is a single check using direct addressing not enough ?
:=:=thanks
:=:=joe
:=You are misunderstanding what they are doing.
:=They do not check RCIF twice. They check first if the interrupt is enabled (register PIE1, at address 8C), then if it is enabled, check if this interrupt has happened (PIR1 at address 0C). Obviously, it is possible for an interrupt flag to have triggered on a peripheral, that currently has it's interrupts disabled, hence the two checks...
:=
:=Best Wishes
:=
:=:=0004: MOVWF 7F // save W to 7F
:=:=0005: SWAPF 03,W // swap status
:=:=0006: CLRF 03 // clear status
:=:=0007: MOVWF 3B // save status
:=:=0008: MOVF 0A,W // save PCLATH
:=:=0009: MOVWF 3A
:=:=000A: CLRF 0A // clear PCLATH
:=:=000B: MOVF 04,W // save FSR
:=:=000C: MOVWF 3C
:=:=000D: MOVF 77,W // save 77
:=:=000E: MOVWF 3D
:=:=000F: MOVF 78,W // save 78
:=:=0010: MOVWF 3E
:=:=0011: MOVF 79,W // save 79
:=:=0012: MOVWF 3F
:=:=0013: MOVF 7A,W // save 7A
:=:=0014: MOVWF 40
:=:=0015: MOVF 7B,W // save 7B
:=:=0016: MOVWF 41
:=:=0017: BCF 03.7 // clear IRP
:=:=0018: BCF 03.5 // clear RP0
:=:=0019: MOVLW 8C // Get PIR1
:=:=001A: MOVWF 04 // with indirect addressing
:=:=001B: BTFSS 00.5 // Check RCIF if 1
:=:=001C: GOTO 01F // goto to check other itr flags
:=:=001D: BTFSC 0C.5 // recheck RCIF direct addressing ????????
:=:=001E: GOTO 038 // RX itr starts in 038
:=:=001F: MOVLW 8C // Get PIR1
:=:=0020: MOVWF 04 // with indirect addressing
:=:=0021: BTFSS 00.0 // Check for TMR1IF
:=:=0022: GOTO 025 // exit ISR
:=:=0023: BTFSC 0C.0 // recheck TMR1IF direct addressing ????????
:=:=0024: GOTO 03B // TIMER1 itr starts in 03B
:=:=0025: MOVF 3C,W
:=:=0026: MOVWF 04 // restore FSR
:=:=0027: MOVF 3D,W
:=:=0028: MOVWF 77 // restore 77
:=:=0029: MOVF 3E,W
:=:=002A: MOVWF 78 // restore 77
:=:=002B: MOVF 3F,W
:=:=002C: MOVWF 79 // restore 77
:=:=002D: MOVF 40,W
:=:=002E: MOVWF 7A // restore 77
:=:=002F: MOVF 41,W
:=:=0030: MOVWF 7B // restore 77
:=:=0031: MOVF 3A,W
:=:=0032: MOVWF 0A // restore PCLATH
:=:=0033: SWAPF 3B,W
:=:=0034: MOVWF 03 // restore STATUS
:=:=0035: SWAPF 7F,F
:=:=0036: SWAPF 7F,W // restore W
:=:=0037: RETFIE
___________________________
This message was ported from CCS's old forum
Original Post ID: 13920