| View previous topic :: View next topic | 
	
	
		| Author | Message | 
	
		| kgng97ccs 
 
 
 Joined: 02 Apr 2022
 Posts: 103
 
 
 
			    
 
 | 
			
				| Using setup_spi |  
				|  Posted: Sun Apr 09, 2023 10:04 pm |   |  
				| 
 |  
				| We have an old program that uses the PICF45K20 MCU and has the following statement:  	  | Code: |  	  | setup_spi(SPI_MASTER | SPI_CLK_DIV_4 | SPI_SS_DISABLED | SPI_L_TO_H); | 
 Immediately after the statement, we set a breakpoint to check the SSPCON1 register setting, which shows 00100001.
 
 This setting suggests that the SPI is running at a clock of FOSC/16 instead of the FOSC/4 set in the setup_spi() function?
 
 Is it correct that the SPI_SS_DISABLED parameter should not be there?
 
 We compiled the program using CCS C compiler v5.115 on MPLAB IDE v8.92.
 
 I will appreciate any comment or advice. Thank you.
 |  | 
	
		|  | 
	
		| PCM programmer 
 
 
 Joined: 06 Sep 2003
 Posts: 21708
 
 
 
			    
 
 | 
			
				|  |  
				|  Posted: Mon Apr 10, 2023 6:01 am |   |  
				| 
 |  
				| SPI_SS_DISABLED is only used as a setting for an SPI Slave. You are using the PIC as an SPI Master, so SPI_SS_DISABLED should not be there.
 Remove it.
 |  | 
	
		|  | 
	
		| Ttelmah 
 
 
 Joined: 11 Mar 2010
 Posts: 19967
 
 
 
			    
 
 | 
			
				|  |  
				|  Posted: Mon Apr 10, 2023 10:41 am |   |  
				| 
 |  
				| and on the clock, read the data sheet. The SPI peripheral is fed with the master oscillator/4.
 The setup sets the prescaler _from this_.
 So selecting a prescaler of /4, sets the SPI to run off FOSC/16
 |  | 
	
		|  | 
	
		| kgng97ccs 
 
 
 Joined: 02 Apr 2022
 Posts: 103
 
 
 
			    
 
 | 
			
				|  |  
				|  Posted: Tue Apr 11, 2023 1:20 am |   |  
				| 
 |  
				| Thank you, PCM Programmer and Ttelmah, for your input. 
 
  	  | Ttelmah wrote: |  	  | The SPI peripheral is fed with the master oscillator/4. The setup sets the prescaler _from this_.
 So selecting a prescaler of /4, sets the SPI to run off FOSC/16
 | 
 When we examined the #define constants provided in the CCS 18F45K20.h file for the setup_spi() function, we can see that the constants make the x in SPI_CLK_DIV_x match the intended divisor.
 
 For example, SPI_CLK_DIV_4  is defined as 0, and gives the resulting SSPM bits of the SSPCON1 register as 0000, which refers to an SPI clock of FOSC/4. Similarly, SPI_CLK_DIV_16 is defined as 1, and SPI_CLK_DIV_64  is defined as 2, and both give the intended clocks FOSC/16 and FOSC/64 respectively, as confirmed by the resulting SSPM bits.
 
 In addition, Figure 17-1 (page 180) of the PIC18F45K20 datasheet indicates Tosc as the input to the MSSP (followed by a prescalar of 4, 16, or 64), and we understand that to mean FOSC.
 
 I wonder if our understanding is correct.
 |  | 
	
		|  | 
	
		|  |