Porting 16C63 to 16C66

[Mother]

I'm trying to port some code from the 16C63 to the 16C66, under MPLAB 5.00.00 with PCM 3.023. The code I have works on the 63 but, when compiled for the 66 it fails to run, despite having no changes other than the #device directive.

So far I've determined that the problem seems to be with serial I/O interrupts, as other parts of the code seem to be working. I've given the generated code in these areas a cursory examination, and it seems to be okay.

My next step is a comparison of the two assembly listings, but before I embark on that, does anybody know of any bugs that might account for the behaviour I'm seeing?
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Original Post ID: 13484

[regan]

One important difference between the 63 and 66 chips is the memory mapping. The address ranges F0-FF,170-17F and 1F0-1FF are mapped to 70-7F on the 66. If you are currently using any RAM between F0 to FF, then you may experience problems. The other possibility is that the problem manifests itself because the compiler has had to adjust the allocation of RAM, in order to avoid these commonly addressed areas. Check your SYM file to see how the compiler has shifted the RAM around.


Regan.
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Original Post ID: 13487

[Mother]

I haven't explicitly reserved any RAM areas, and I assume the compiler knows the architecture of the target processor. Most of the common RAM seems to be used for temporary storage.

I've only looked at the common RAM areas so far, but I'll check the entire symbol table as you suggest. Maybe I've overrun an array somewhere and its now adjacent to something more important than before.

Thanks for your help - you've given me some ideas to pursue. I'll post the solution (if and) when I find it!
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Original Post ID: 13489

[Mother]

As I suspected, an array access that was out of bounds. How dull.
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This message was ported from CCS's old forum
Original Post ID: 13656